mt48lc1m16a1 Micron Semiconductor Products, mt48lc1m16a1 Datasheet - Page 50

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mt48lc1m16a1

Manufacturer Part Number
mt48lc1m16a1
Description
Synchronous Dram
Manufacturer
Micron Semiconductor Products
Datasheet

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TIMING PARAMETERS
*CAS latency indicated in parentheses.
NOTE: 1. For this example, the burst length = 4.
16Mb: x16 IT SDRAM
16MSDRAMx16IT.p65 – Rev. 5/99
COMMAND
SYMBOL* MIN
t
t
t
t
t
t
t
AH
AS
CH
CL
CK (3)
CK (2)
CK (1)
A0-A9
DQM
CKE
A10
CLK
DQ
BA
2. A8 and A9 = “Don’t Care.”
3. DQM represents DQML and DQMH. DQML controls the lower byte, and DQMH controls the upper byte.
3
t CMS t CMH
t CKS
2.5
2.5
20
t AS
t AS
t AS
1
2
6
8
ACTIVE
T0
ROW
ROW
BANK
-6
t CKH
t AH
t AH
t AH
MAX
t RCD
MIN
t CK
2.75
2.75
10
25
1
2
7
T1
NOP
-7
MAX
DISABLE AUTO PRECHARGE
ENABLE AUTO PRECHARGE
t CL
t CMS
MIN
13
25
t DS
1
2
3
3
8
COLUMN m
(A0 - A7)
WRITE – DQM OPERATION
WRITE
-8A
T2
BANK
D
IN
t CMH
t DH
MAX
t CH
m
2
UNITS
ns
ns
ns
ns
ns
ns
ns
T3
NOP
50
SYMBOL* MIN
t
t
t
t
t
t
t
CKH
CKS
CMH
CMS
DH
DS
RCD
t DS
D
IN
T4
NOP
m + 2
t DH
Micron Technology, Inc., reserves the right to change products or specifications without notice.
18
1
2
1
2
1
2
1
-6
t DS
D
MAX
T5
IN
NOP
m + 3
t DH
MIN
20
1
2
1
2
1
2
-7
MAX
NOP
T6
16Mb: x16
MIN
IT SDRAM
24
1
2
1
2
1
2
©1999, Micron Technology, Inc.
-8A
NOP
MAX
T7
DON’T CARE
UNDEFINED
UNITS
ns
ns
ns
ns
ns
ns
ns

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