mt48lc1m16a1 Micron Semiconductor Products, mt48lc1m16a1 Datasheet - Page 45

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mt48lc1m16a1

Manufacturer Part Number
mt48lc1m16a1
Description
Synchronous Dram
Manufacturer
Micron Semiconductor Products
Datasheet

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TIMING PARAMETERS
*CAS latency indicated in parentheses.
NOTE: 1. For this example, the burst length = 4, and the WRITE burst is followed by a “manual” PRECHARGE.
16Mb: x16 IT SDRAM
16MSDRAMx16IT.p65 – Rev. 5/99
SYMBOL* MIN
t
t
t
t
t
t
t
t
t
AH
AS
CH
CL
CK (3)
CK (2)
CK (1)
CKH
CKS
2. 10ns is required between <D
3. A8, A9 = “Don’t Care.”
DQML, DQMH
2.5
2.5
20
1
2
6
8
1
2
COMMAND
A0-A9, A11
BA0, BA1
-6
DQM /
MAX
CKE
A10
CLK
DQ
t CMS
t CKS
t AS
t AS
t AS
MIN
2.75
2.75
10
25
1
2
7
1
2
ACTIVE
T0
ROW
ROW
BANK
SINGLE WRITE – WITHOUT AUTO PRECHARGE
t CKH
t CMH
-7
t AH
t AH
t AH
MAX
t RCD
t RAS
t RC
IN
t CK
m> and the PRECHARGE command, regardless of frequency, to meet
MIN
T1
13
25
NOP
1
2
3
3
8
1
2
DISABLE AUTO PRECHARGE
-8A
MAX
t CMS
t CL
t DS
COLUMN m 3
WRITE
UNITS
BANK
T2
D
IN
ns
ns
ns
ns
ns
ns
ns
ns
ns
t CMH
t CH
t DH
m
45
t WR
T3
NOP
2
SYMBOL* MIN
t
t
t
t
t
t
t
t
t
CMH
CMS
DH
DS
RAS
RC
RCD
RP
WR
SINGLE BANK
PRECHARGE
Micron Technology, Inc., reserves the right to change products or specifications without notice.
ALL BANKS
BANK
T4
42
60
18
18
10
1
2
1
2
-6
120,000
MAX
T5
NOP
t RP
MIN
42
70
20
21
10
1
2
1
2
1
-7
120,000
MAX
ACTIVE
T6
ROW
ROW
BANK
16Mb: x16
t
WR.
MIN
IT SDRAM
DON’T CARE
48
80
24
24
10
1
2
1
2
©1999, Micron Technology, Inc.
-8A
120,000
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns

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