gc80c520a CORERIVER Semiconductor, gc80c520a Datasheet - Page 11
gc80c520a
Manufacturer Part Number
gc80c520a
Description
Midas1.0 Family Mask Rom/eprom/romless 8-bit Turbo Microcontrollers
Manufacturer
CORERIVER Semiconductor
Datasheet
1.GC80C520A.pdf
(187 pages)
- Current page: 11 of 187
- Download datasheet (2Mb)
3 Block Diagram
Figure 3-1 shows the block diagram of MiDAS1.0 family
memory (ROM or EPROM) and executes them. Data are processed and read from or written to data
memory (RAM) or integrated peripherals via special function registers (SFRs). For data processing inside
the CPU, the arithmetic and logic unit (ALU) is used.
Data processing as well as reading and writing is supported by a set of registers. Except for the program
counter (PC) and the four general-purpose register banks, these registers are mapped to the special
function register area. The program counter resides inside the CPU, and the four register banks are
mapped to the internal RAM.
MiDAS1.0 Family
ALE
TURBO
80C52
RESET
CORE
RESET
PSEN
XTAL1
POR
LVD
VDD
External
Osc.
XTAL2
Figure 3-1 Block Diagram
(256B)
RAM
1)
Page 11 of 187
P4[3:0] are only available for 44-PLCC and 44-MQFP type Package.
Controller
Port
P4[3:0]
EPROM/
(0/8KB)
EA / VPP
ROM
1)
CPU BUS
.
P3[7:0]
The CPU fetches instructions from the program
ADC
Timer0
Timer1
Timer2
P2[7:0]
Controller
Interrupt
UART
P1[7:0]
WDT
VSS
Controller
OTP I/F
P0[7:0]
PWM0
PWM1
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