gc80c520a CORERIVER Semiconductor, gc80c520a Datasheet - Page 50

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gc80c520a

Manufacturer Part Number
gc80c520a
Description
Midas1.0 Family Mask Rom/eprom/romless 8-bit Turbo Microcontrollers
Manufacturer
CORERIVER Semiconductor
Datasheet
6.2.5.3 Mode 2
In Mode 2, the UART communicates asynchronously in full-duplex mode. Eleven bits are transmitted
(through TXD), or received (through RXD): start bit (0), 8 data bits (LSB first), a programmable 9
(TB8) and a stop bit (0). On transmission, the 9
reception, the 9
oscillator frequency, which is determined by the SMOD1 bit (PCON.7). Transmission is initiated by any
instruction that uses SBUF as a destination register. The serial data is sent to TxD at S1 state after the
first roll-over of the divide-by-16 counter. The next bit is placed on TxD at S1 state after the next roll-over
of the divid-by-16 counter. Thus the transmission is synchronized to the divide-by0-16 counter, and not
directly to the write to SBUF signal. After transmission of all 9 bits of data, the stop bit is transmitted. The
TI flag is set at the S1 state after the stop bit has been put out on TxD. This will occur at the 11
of the divide-by-16 counter after a write to SBUF. Reception is enabled only if REN is “1”. Reception is
initiated by detecting 1-to-0 transition of RXD. For this purpose RXD is sampled at a rate of 16 times
whatever baud rate has been established. When a 1-to-0 transition of RXD is detected, the divide-by-16
counter is immediately reset. This aligns its roll-overs with the boundaries of the incoming bit times. The
16 states of the counter divide each bit time into 16 ths.
Write to SBUF
Sample Times
[Transmit]
[Receive]
Bit Detector
RX CLOCK
TX Clock
SEND
Data
Shift
Shift
RXD
TXD
th
RI
TI
data bit goes into RB8 in SCON. The baud rate is programmable to 1/32 or 1/64 of the
S1
/16 Reset
Start bit
Start bit
Figure 6-21 UART Mode 1 Timing
D0
D0
Page 50 of 187
D1
D1
th
data bit (TB8) can be assigned the value of 0 or 1. On
D2
D2
D3
D3
D4
D4
Functional Description
D5
D5
D6
D6
D7
D7
Stop bit
Stop bit
th
roll-over
th
bit

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