gc80c520a CORERIVER Semiconductor, gc80c520a Datasheet - Page 74

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gc80c520a

Manufacturer Part Number
gc80c520a
Description
Midas1.0 Family Mask Rom/eprom/romless 8-bit Turbo Microcontrollers
Manufacturer
CORERIVER Semiconductor
Datasheet
Functional Description
devices, a user can program the encryption array to encrypt the program code bytes during EPROM
verification. For ROM devices, a user submits the encryption array to be programmed by the factory. If an
encryption array is submitted, Lock Bit 1 (LB1) will also be programmed by the factory. The encryption
array is not available without the Lock Bit. Program code verification is performed as usual, except that
each code byte comes out exclusive-NOR’ed (XNOR) with one of the key bytes. Therefore, to read the
ROM/EPROM code, the user has to know the encryption key bytes in their proper sequence.
Unprogrammed bytes have the value FFh. If the Encryption Array is left unprogrammed, all the key bytes
have the value FFh. Since any code byte XNOR’ed with FFh leaves the byte unchanged, leaving the
Encryption Array unprogrammed in effect bypasses the encryption feature.
When using the encryption array feature, one important factor should be considered. If a code byte has
the value FFh, verifying the byte will product the encryption byte value. It is recommended that all unused
code bytes should be programmed with some value other than FFh, and not all of then the same value.
This will ensure maximum program protection.
6.2.12.2 Program Lock Bits
Also included in the Program Lock scheme are Lock Bits which can be enabled to provide varying
degrees of protection. Table 6-15 lists the Lock Bits and their corresponding influence on the device. A
user is responsible for programming the Lock Bits on EPROM devices. On ROM devices, Lock Bit 1 is
automatically set by the factory when the encryption array is submitted. The Lock Bit is not available
without the encryption array on ROM devices.
Erasing the EPROM also erases the Encryption Array and the Lock Bits, returning the part to full
functionality.
Main Cell
(4 K / 8 Kbytes)
Encryption Cell (64 bytes)
Lock Bit Cell (3 bits)
Signature Cell (3 bytes)
Figure 6-39 The EPROM Cell Configuration In Physical Layout
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