gc80c520a CORERIVER Semiconductor, gc80c520a Datasheet - Page 24

• Manufacturer Part Number: gc80c520a
• Description: Midas1.0 Family Mask Rom/eprom/romless 8-bit Turbo Microcontrollers
• Manufacturer: CORERIVER Semiconductor

time for each instruction execution, both the clock edges are used for internal timing. Hence it is important
that the duty cycle of the clock be as close to 50% as possible to avoid timing conflicts. Since the
MiDAS1.0 family fetches one opcode per machine cycle, in most of the instructions, the number of
machine cycles needed to execute the instruction is equal to the number of bytes in the instruction.
6.1.4.1 MOVX Instruction
The MiDAS1.0 family, like the standard 80C52, uses the MOVX instruction to access external Data
Memory. This Data Memory includes both off-chip memory as well as memory-mapped peripherals. While
the results of the MOVX instruction are the same as in the standard 80C52, the operation and the timing
of the strobe signals have been modified in order to give the user much greater flexibility as shown in
Figure 6-3 and Figure 6-4.
The MOVX instruction is of two types: the MOVX @Ri and MOVX @DPTR. In the MOVX @Ri, the
address of the external data comes from two sources. The lower 8-bits of the address are stored in the Ri
register of the selected working register bank. The upper 8-bits of the address come from the port 2 SFR.
CORERIVER
MiDAS1.0
80C52
Intel
Figure 6-2 Comparative Timing of the MiDAS1.0 family and Intel 80C52
PORT0
PORT2
PORT0
PORT2
XTAL1
XTAL1
PSEN
PSEN
ALE
ALE
IR
IR
ADDH_0
INST0
ADDL_12
ADDH_12
INST0
ADDL_1
INST0
ADDH_1
INST12
INST1
S1 S2 S3 S4
S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12
Page 24 of 187
ADDL_2
ADDL_21
INST1
ADDH_2
ADDH_21
INST2
INST21
ADDL_3
1-byte 1-machine Cycle Instruction
1-byte 1-machine Cycle Instruction
INST2
INST1
ADDH_3
INST3
ADDL_22
Functional Description
ADDH_22
INST3
INST22
(4
(12
INST2
clocks)
clocks)