gc80c520a CORERIVER Semiconductor, gc80c520a Datasheet - Page 173

• Manufacturer Part Number: gc80c520a
• Description: Midas1.0 Family Mask Rom/eprom/romless 8-bit Turbo Microcontrollers
• Manufacturer: CORERIVER Semiconductor

This register functions as a mask when comparing serial port addresses for automatic address
recognition. When a bit in this register is set, the corresponding bit location in the SADDR will be exactly
compared with the incoming serial port data to determine if a receiver interrupt should be generated.
When a bit in this register is cleared, the corresponding bit in the SADDR becomes a don’t care and is not
compared against the incoming data. All incoming data will generate a receiver interrupt when this
register is cleared.
15.25 Power Management Register (PMR)
15.26 Status Register (STATUS)
Bit No.
Bit No.
C4h
C5h
Symbol
Symbol
ALEOFF
XTUP
-
-
MiDAS1.0 Family
7
7
-
-
-
-
Function
Reserved.
ALE Disable. This bit disables the expression of the ALE signal on the device pin during
all on-board program and data memory accesses. External memory accesses will
automatically enable ALE independent of ALEOFF.
0: ALE expression is enabled.
1: ALE expression is disabled.
Function
Reserved.
Crystal Oscillator Warm-up Status. This bit indicates whether the CPU crystal oscillator
has completed the 65,536 cycle warm-up and is ready to operate from the external
crystal or oscillator. This bit is cleared by H/W when Power-on Reset, during Power
Down wake-up. This bit is set to 1 following a XTAL stabilization by H/W.
6
6
-
-
-
-
5
5
-
-
-
-
XTUP
R(0)
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4
4
-
-
3
3
-
-
-
-
ALEOFF
R/W(0)
2
2
-
-
1
1
-
-
-
-
0
0
-
-
-
-
STATUS
PMR