gc80c520a CORERIVER Semiconductor, gc80c520a Datasheet - Page 42

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gc80c520a

Manufacturer Part Number
gc80c520a
Description
Midas1.0 Family Mask Rom/eprom/romless 8-bit Turbo Microcontrollers
Manufacturer
CORERIVER Semiconductor
Datasheet
6.2.4.2 Timer/Counter 2
Timer/Counter 2 is a 16-bit up/down counter which is configured by the T2MOD SFR and controlled by
the T2CON SFR. Like Timers 0 and 1, it can operate either as a timer or as an event counter.
Timer/Counter 2 counts either the external pulses of T2 pin (C/T2=1) or the prescaled clock(C/T2=0),
which is divided by 12 or 4. If T2M = 0, 1/12 clock will be selected. Timer 2 counts when TR2 is 1, and
stops when TR2 is 0.
6.2.4.2.1 Capture Mode
The capture mode is established by setting the CP/RL2 bit in the T2CON SFR to 1. In the capture mode,
Timer/Counter 2 operates as a 16-bit up-counter. When the counter rolls over from FFFFh to 0000h, the
TF2 bit is set, which will generate an interrupt request. If the EXEN2 bit is set, a negative transition of
T2EX pin will cause the value in the TL2 and TH2 register to be captured by the RCAP2L and RCAP2H
registers. This action also causes the EXF2 bit in T2CON to be set, which will also generate an interrupt.
INTx PIN
INTx PIN
OSC
OSC
GATE
GATE
Tx PIN
Tx PIN
TxM
TxM
1/12
1/12
1/4
1/4
TRx
TRx
0
1
0
1
C/T=0
C/T=1
C/T=0
C/T=1
[Mode 0]
[Mode 2]
CONTROL
CONTROL
Figure 6-15 Timer/Counter 0/1 in Mode 0/1/2/3
(5bits)
(8bits)
(8bits)
THx
TLx
TLx
(8bits)
THx
RELOAD
TFx
TFx
Interrupt
Interrupt
Page 42 of 187
INT0 PIN
INTx PIN
OSC
OSC
OSC
GATE
GATE
Tx PIN
T0 PIN
TxM
T0M
T0M
1/12
1/12
1/12
1/4
1/4
1/4
TRx
TR0
TR1
0
1
0
1
0
1
[Mode 3(Timer 0 only)]
Functional Description
C/T=0
C/T=1
C/T=0
C/T=1
[Mode 1]
CONTROL
CONTROL
CONTROL
(8bits)
TLx
(8bits)
(8bits)
TH0
TL0
(8bits)
THx
TFx
TF0
TF1
Interrupt
Timer 0
Interrupt
Timer 1
Interrupt

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