dp83251 National Semiconductor Corporation, dp83251 Datasheet - Page 23

• Manufacturer Part Number: dp83251
• Description: Player Device Fddi Physical Layer Controller
• Manufacturer: National Semiconductor Corporation

D0 D1
D2 D3
D4 D5
D6
D7
5 0 Registers
CONFIGURATION REGISTER (CR)
The Configuration Register controls the Configuration Switch Block and enables disables both the A and B Indicate output
ports
Note that the B Indicate output port is offered only on the DP83255 (for Dual Attach Stations) and not in the DP83251 (for
Single Attach Stations)
For further information refer to Section 3 3 Configuration Switch
ACCESS RULES
Bit
D7
BIE
ADDRESS
01h
AIS0 AIS1
BIS0 BIS1
TRS0 TRS1
AIE
BIE
Symbol
D6
AIE
(Continued)
Always
D5
TRS1
READ
A INDICATE SELECTOR
Configuration Switch data buses for the A Indicate output port (AIP AIC AID
B INDICATE SELECTOR
Configuration Switch data buses for the B Indicate output port (BIP BIC BID
Note Even though this bit can be set and or cleared in the DP83251 (for Single Attach Stations) it will not affect
any I Os since the DP83251 does not offer a B Indicate port
TRANSMIT REQUEST SELECTOR
one of the four Configuration Switch data buses for the input to the Transmitter Block
Note If the PLAYER device is in Active Transmit Mode (i e the Transmit Mode bits (TM
Transmit State Register (CTSR) are set to 000) and the PHY Invalid Bus is selected then the PLAYER device will
transmit a maximum of four Halt symbol pairs and then continuous Idle symbols due to the Repeat Filter
A INDICATE ENABLE
B INDICATE ENABLE
Note Even though this bit can be set and or cleared in the DP83251 (for Single Attach Stations) it will not affect
any I Os since the DP83251 does not offer a B Indicate port
0 Disables the A Indicate output port The A Indicate port pins will be at TRI-STATE when
1 Enables the A Indicate output port (AIP AIC AID
0 Disable the B Indicate output port The B Indicate port pins will be at TRI-STATE
1 Enables the B Indicate output port (BIP BIC BID
the port is disabled
when the port is disabled
D4
TRS0
TRS1
AIS1
BIS1
0
0
1
1
0
0
1
1
0
0
1
1
WRITE
Always
D3
BIS1
k
k
TRS0
AIS0
BIS0
0 1
0 1
0
1
0
1
0
1
0
1
0
1
0
1
23
l
l
k
The A Indicate Selector
The B Indicate Selector
0 1
D2
BIS0
l
Description
PHY Invalid Bus
Receiver Bus
A Request Bus
B Request Bus
PHY Invalid Bus
Receiver Bus
A Request Bus
B Request Bus
PHY Invalid Bus
Receiver Bus
A Request Bus
B Request Bus
The Transmit Request Selector
D1
AIS1
k
k
7 0
7 0
l
l
k
k
)
)
0 1
0 1
D0
AIS0
l
l
bits select one of the four
bits select one of the four
k
2 0
k
k
k
0 1
l
7 0
7 0
) of the Current
l
l
l
)
)
bits select