dp83251 National Semiconductor Corporation, dp83251 Datasheet - Page 46

• Manufacturer Part Number: dp83251
• Description: Player Device Fddi Physical Layer Controller
• Manufacturer: National Semiconductor Corporation

5 0 Registers
LINK ERROR THRESHOLD REGISTER (LETR)
The Link Error Threshold Register contains the start value for the Link Error Monitor Counter which is an 8-bit down-counter that
decrements if link errors are detected
When the Counter reaches 0 the Link Error Monitor Threshold Register value is loaded into the Link Error Monitor Counter and
the Link Error Monitor Threshold bit (LEMT) of the Interrupt Condition Register (ICR) is set to 1
The Link Error Monitor Threshold Register value is also loaded into the Link Error Monitor Counter during every Control Bus
Interface write-cycle of LETR
The Counter is initialized to 0 during the reset process (i e RST
ACCESS RULES
D0
D1 – 6
D7
D7
LET7
ADDRESS
Bit
15h
D6
LET6
(Continued)
LET0
LET1 – 6
LET7
Symbol
READ
Always
D5
LET5
D4
LET4
WRITE
Always
LINK ERROR THRESHOLD BIT
for the Link Error Monitor Counter
LINK ERROR THRESHOLD BIT
the Link Error Monitor Counter
LINK ERROR THRESHOLD BIT
for the Link Error Monitor Counter
D3
LET3
46
e
GND)
D2
LET2
Description
k
k
k
0
1 – 6
7
D1
LET1
l
l
l
Least significant bit of the start value
Most significant bit of the start value
Intermediate bits of start value for
D0
LET0