dp83251 National Semiconductor Corporation, dp83251 Datasheet - Page 87

no-image

dp83251

Manufacturer Part Number
dp83251
Description
Player Device Fddi Physical Layer Controller
Manufacturer
National Semiconductor Corporation
Datasheet
8 0 Detailed Descriptions
This section describes in detail several functions that had
been discussed previously in Section 3 0 Functional De-
scriptions
8 1 FRAMING HOLD RULES
DETECTING JK
The JK symbol pair can be used to detect the beginning of a
frame during Active Line State (ALS) and Idle Line State
(ILS)
While the Line State Detector is in the Idle Line State the
PLAYER device ‘‘reframes’’ upon detecting a JK symbol
pair and enters the Active Line State
During Active Line State acceptance of a JK symbol (re-
framing) is allowed on any on-boundary JK which is detect-
ed at least 1 5 byte times after the previous JK
During Active Line State once reframed on a JK the subse-
quent off-boundary JK is ignored even if it is detected be-
yond 1 5 byte times after the previous JK
During Active Line State an Idle or Ending Delimiter (T)
symbol will allow reframing on any subsequent JK if a JK is
detected at least 1 5 bytes times after the previous JK
DETECTING HALT-HALT
During Idle Line State the detection of a Halt-Halt or Halt-
Quiet symbol pair will still allow the reframing of any subse-
quent on-boundary JK
Once a JK is detected during Active Line State off-bounda-
ry Halt-Halt or Halt-Quiet symbol pairs are ignored until the
Elasticity Buffer (EB) has an opportunity to recenter They
are treated as violations
After recentering on a Halt-Halt or Halt-Quiet symbol pair
all off-boundary Halt-Halt or Halt-Quiet symbol pairs are ig-
nored until the EB has a chance to recenter during a line
state other than Active Line State (which may be as long as
2 8 byte times)
HALT-QUIET
87
8 2 NOISE EVENTS
A Noise Event is defined as follows
A noise event is a noise byte a byte of data which is not in
line with the current line state indicating error or corruption
Noise Event
Where
SD
CD
PB
PLS
PI
ILS
ALS
ULS
HLS
QLS
MLS
NLS
ULS
I
J
K
R
S
T
A
B
n

a
E
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
Logical AND
Logical OR
Logical NOT
Signal Detect
Clock Detect
Previous Byte
Previous Line State
PHY Invalid
Idle Line State
Active Line State
Unknown Line State
Halt Line State
Quiet Line State
Master Line State
Noise Line State
Unknown Line State
Idle symbol
First symbol of start delimiter
Second symbol of start delimiter
Reset symbol
Set symbol
End delimiter
n
n
Any data symbol
a
a
e
R
R
SD
SD
SD
a
a



S
S
E CD
CD
CD
e
a
a
HLS
NLS
(ALS
T
T


PI
E PI
a
a

a
I
a
a
E (II

ILS)
(PB
QLS
ULS
a
e
JK
II)
a

a

MLS
AB
AB)
PLS
a
a
e

Related parts for dp83251