dp83251 National Semiconductor Corporation, dp83251 Datasheet - Page 43

• Manufacturer Part Number: dp83251
• Description: Player Device Fddi Physical Layer Controller
• Manufacturer: National Semiconductor Corporation

5 0 Registers
STATE PRESCALE THRESHOLD REGISTER (SPTR)
The State Prescale Threshold Register contains the start value for the State Prescale Counter The State Prescale Counter is a
down counter The Register is used in conjunction with the State Counter to count the Line State duration
The State Prescale Counter will decrement every 80 ns if the current Line State is Halt Line Idle Line State Master Line State
Quiet Line State or No Signal Detect As a result the State Prescale Counter takes SPTR x 80 ns to reach zero during a
continuous line state condition When the State Prescale Counter reaches zero the State Prescale Threshold Register will be
reloaded into the State Prescale Counter
The threshold values for the State Counter and State Prescale Counter are simultaneously loaded into both counters if one of
the following conditions is true
(1) Both the State Counter and State Prescale Counter reach zero and the current Line State is Halt Line State Idle Line State
or
(2) A Line State change occurs and the new Line State is Halt Line State Idle Line State Master Line State Quiet Line State or
(3) The State Threshold Register or State Prescale Threshold Register goes through a Control Bus Interface write cycle
The State Counter and State Prescale Counter will reset by reloading the threshold values if a Line State change occurs and the
new Line State is Halt Line State Idle Line State Master Line State Quiet Line State or No Signal Detect
ACCESS RULES
D0
D1 – 6
D7
Master Line State Quiet Line State or No Signal Detect
No Signal Detect
or
D7
SPT7
ADDRESS
Bit
12h
D6
SPT6
(Continued)
SPT0
SPT1 – 6
SPT7
Symbol
READ
Always
D5
SPT5
D4
SPT4
WRITE
Always
STATE PRESCALE THRESHOLD BIT
the start value for the State Prescale Counter
STATE PRESCALE THRESHOLD BIT
value for the State Prescale Counter
STATE PRESCALE THRESHOLD BIT
the start value for the State Prescale Counter
D3
SPT3
43
D2
SPT2
Description
D1
SPT1
k
k
k
0
1 – 6
7
l
l
l
Least significant bit (LSB) of
Most significant bit (MSB) of
Intermediate bits of start
D0
SPT0