tmp1940cyaf TOSHIBA Semiconductor CORPORATION, tmp1940cyaf Datasheet - Page 125
tmp1940cyaf
Manufacturer Part Number
tmp1940cyaf
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP1940CYAF.pdf
(464 pages)
- Current page: 125 of 464
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BMA2
(0xFFFF_E408)
BMA3
(0xFFFF_E40C)
Name
Read/Write
Reset Value
Function
Name
Read/Write
Reset Value
Function
Name
Read/Write
Reset Value
Function
Name
Read/Write
Reset Value
Function
Name
Read/Write
Reset Value
Function
Name
Read/Write
Reset Value
Function
Name
Read/Write
Reset Value
Function
Name
Read/Write
Reset Value
Function
Note: Bits 9–15 in the BMA2 and BMA3 must be written as zeros. The CS2 and CS3 block sizes can
vary from 32 Kbytes to 1 Gbytes. However, the TMP1940CYAF supports only 16 Mbytes of
external address space. Therefore, bits 9–15 in the BMA0 and BMA1 must be cleared so that
A24–A30 of an address will not be masked.
Figure 9.2 Base/Mask Address Registers (BMA2 and BMA3)
15
23
31
15
23
31
7
7
1
0
0
0
1
0
0
0
CS2 block size
CS3 block size
14
22
30
14
22
30
6
6
1
0
0
0
1
0
0
0
TMP1940CYAF-83
A23–A16 of the starting address for CS2
A31–A24 of the starting address for CS2
A23–A16 of the starting address for CS3
A31–A24 of the starting address for CS3
13
21
29
13
21
29
5
5
1
0
0
0
1
0
0
0
Must be written as 0.
Must be written as 0.
0: The address compare logic uses this address bit.
0: The address compare logic uses this address bit.
MA2 (A30 – A15)
MA2 (A30 – A15)
MA3 (A30 – A15)
MA3 (A30 – A15)
12
20
28
12
20
28
4
4
1
0
0
0
1
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
BA2
BA2
BA3
BA3
11
19
27
11
19
27
3
3
1
0
0
0
1
0
0
0
TMP1940CYAF
10
18
26
10
18
26
2
2
1
0
0
0
1
0
0
0
17
25
17
25
1
9
1
9
1
0
0
0
1
0
0
0
16
24
16
24
0
8
0
8
1
1
0
0
1
1
0
0
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