tmp1940cyaf TOSHIBA Semiconductor CORPORATION, tmp1940cyaf Datasheet - Page 132
tmp1940cyaf
Manufacturer Part Number
tmp1940cyaf
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP1940CYAF.pdf
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10. DMA Controller (DMAC)
10.1 Features
The TX1940CYAF contains a four-channel DMA controller.
(1) Four independent DMA channels
(2) Two types of bus requests, with and without bus snooping
(3) Transfer requests:
(4) Dual-address mode
(5) Memory-to-memory, memory-to-I/O, and I/O-to-memory transfers
(6) Transfer width:
(7) Address pointers can increment, decrement or remain constant. The user can program the bit positions
(8) Fixed channel priority
The TMP1940CYAF DMAC has the following features:
Internal transfer requests: Software initiated
External transfer requests: Hardware signals from on-chip peripherals and external interrupt pins
at which address incrementation or decrementation occurs.
Memory: 32-bit (8-bit and 16-bit memory devices are supported through the programming of the
CS/Wait Controller.)
I/O peripherals: 8-, 16-, and 32-bit
TMP1940CYAF-90
TMP1940CYAF
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