tmp1940cyaf TOSHIBA Semiconductor CORPORATION, tmp1940cyaf Datasheet - Page 371
tmp1940cyaf
Manufacturer Part Number
tmp1940cyaf
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP1940CYAF.pdf
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3.3.2
3.3.3
Parenthesized numbers indicate that the relevant pins are at the logic states shown in Table 3.2.
Reset Operation
power supply voltage and the internal high-frequency oscillator have stabilized. This time is typically 3
Operation, in the TMP1940CYAF datasheet.
Memory Maps
on-chip flash memory. Following are the memory maps in each operating mode.
s at 32 MHz when the on-chip PLL is utilized. For a detailed description, see Section 3.1.1, Reset
Normal Mode
To reset the TMP1940FDBF,
The memory map for the TMP1940FDBF varies according to the mode of operation selected for the
Single-Chip Mode
Programmer
User-defined
Mode
condition
Figure 3.2 Mode Transitions
User Boot
Mode
TMP1940FDBF-13
RESET
Any condition other than (4) +
(1) or (2)
must be asserted for at least 12 system clock periods after the
RESET = 0
(4)
Programming Mode
RESET = 0
On-Board
Boot Mode
Single
(3)
RESET = 0
Reset
TMP1940FDBF
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