tmp1940cyaf TOSHIBA Semiconductor CORPORATION, tmp1940cyaf Datasheet - Page 389

• Manufacturer Part Number: tmp1940cyaf
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

3.5.3
3.5.4
Internal
ROM
Figure 3.9 Memory Maps for Normal and Single Boot Modes (Physical Addresses)
Configuring for Single Boot Mode
shown above, and then release
Memory Map
Boot mode, the on-chip flash memory is mapped to physical addresses 0x4000_0000 through
0x4007_FFFF, and the on-chip boot ROM is mapped to physical addresses 0x1FC0_0000 through
0x1FC0_17FF.
For on-board programming, boot the TMP1940FDBF in Single Boot mode, as follows:
Set the
Figure 3.9 shows a comparison of the memory maps in Normal and Single Boot modes. In Single
On-Chip Peripherals
On-Chip RAM (16 KB)
Used for debugging
User Program Area
Maskable Interrupt
Exception Vector
On-Chip ROM
Normal Mode
Inaccessible
(Reserved)
(Reserved)
(Reserved)
(Reserved)
(Reserved)
RESET
BW0
BW1
(512 MB)
BOOT
RESET
Shadow
Area
Area
(P85) = 0
input at logic 0, and the BW0, BW1 and
= 1
= 1
= 0
0xFFFF_FFFF
0xFFFF_E000
0xFFFF_BFFF
0xFFFF_8000
0xFF3F_FFFF
0xFF20_0000
0xFF00_0000
0xC000_0000
0xBF00_0000
0x4007_FFFF
0x4000_0000
0x2000_0000
0x1FC7_FFFF
0x1FC0_0400
0x1FC0_0000
0x0000_0000
RESET
1
TMP1940FDBF-31
(high).
BOOT
On-Chip Peripherals
On-Chip Flash ROM
Single Boot Mode
Used for debugging
On-Chip RAM (16 KB)
Inaccessible
(Reserved)
(Reserved)
(Reserved)
(Reserved)
(Reserved)
Boot ROM
(512 MB)
(P85) inputs at the logic values
TMP1940FDBF
(6 KB)
0xFFFF_FFFF
0xFFFF_E000
0xFFFF_BFFF
0xFFFF_8000
0xFF3F_FFFF
0xFF20_0000
0xFF00_0000
0xC000_0000
0xBF00_0000
0x4007_FFFF
0x4000_0000
0x2000_0000
0x1FC0_17FF
0x1FC0_0000
0x0000_0000