zl50415 Zarlink Semiconductor, zl50415 Datasheet - Page 117

• Manufacturer Part Number: zl50415
• Description: Managed 16-port 10/100 M + 2-port 1 G Ethernet Switch
• Manufacturer: Zarlink Semiconductor

15.2
All pins are CMOS type; all Input Pins are 5 Volt tolerance; and all Output Pins are 3.3 CMOS drive.
15.2.1
CPU BUS Interface in Managed Mode
C19, B19, A19, C20, B20,
A20, C21, E20, A21, B24,
B22, A22, C23, B23, A23,
C24
C22, A24, A25
A26
B26
C25
B25
Frame Buffer Interface
D20, B21, D19, E19,D18,
E18, D17, E17, D16, E16,
D15, E15, D14, E14, D13,
E13, D21, E21, A18, B18,
C18, A17, B17, C17, A16,
B16, C16, A15, B15, C15,
A14, B14, D9, E9, D8, E8,
D7, E7, D6, E6, D5, E5, D4,
E4, D3, E3, D2, E2, A7, B7,
A6, B6, C6, A5, B5, C5, A4,
B4, C4, A3, B3, C3, B2, C2
C14, A13, B13, C13, A12,
B12, C12, A11, B11, C11,
D11, E11, A10, B10, D10,
E10, A8, C7
B8
C1
C9
D12
Ball – Signal Descriptions in Managed Mode
Ball Signal Descriptions in Managed Mode
Ball No(s)
P_DATA[15:0]
P_A[2:0]
P_WE#
P_RD#
P_CS#
P_INT#
LA_D[63:0]
LA_A[20:3]
LA_ADSC#
LA_CLK
LA_WE#
LA_WE0#
Symbol
Zarlink Semiconductor Inc.
ZL50418
I/O-TS with pull up
Except P_DATA[7:6]
I/O-TS with pull down
Input
Input with weak
internal pull up
Input with weak
internal pull up
Input with weak
internal pull up
Output
Output
Output with pull up
Output
Output with pull up
Output with pull up
I/O-TS with pullup
117
I/O
Processor Bus Data Bit [15:0].
P_DATA[7:0] is used in 8-bit
mode.
Processor Bus Address Bit [2:0]
CPU Bus-Write Enable
CPU Bus-Read Enable
Chip Select
CPU Interrupt
Frame Bank A– Data Bit [63:0]
Frame Bank A – Address Bit
[20:3]
Frame Bank A Address Status
Control
Frame Bank A Clock Input
Frame Bank A Write Chip Select
for one layer SRAM configuration
Frame Bank A Write Chip Select
for lower layer of two layers
SRAM configuration
Description
Data Sheet