zl50415 Zarlink Semiconductor, zl50415 Datasheet - Page 80

• Manufacturer Part Number: zl50415
• Description: Managed 16-port 10/100 M + 2-port 1 G Ethernet Switch
• Manufacturer: Zarlink Semiconductor

14.7.8
CPU Address:h310
Accessed by CPU, serial interface (R/W)
The CPU can dynamically mask the interrupt when it is busy and doesn’t want to be interrupted ( Default 0xFF)
Bit [0]: Port 0 statistic counter wrap around interrupt mask. An Interrupt is generated when a statistic counter wraps
around. Refer to hardware statistic counter for interrupt sources.
Bit [1]: Port 0 link change mask
Bit [4]: Port 1 statistic counter wrap around interrupt mask. Refer to hardware statistic counter for interrupt sources.
Bit [5]: Port 1 link change mask
14.7.9
CPU Address:h311
Accessed by CPU, serial interface (R/W)
14.7.10
CPU Address:h312
Accessed by CPU, serial interface (R/W)
14.7.11
CPU Address:h313
Accessed by CPU, serial interface (R/W)
14.7.12
CPU Address:h314
Accessed by CPU, serial interface (R/W)
14.7.13
CPU Address:h315
Accessed by CPU, serial interface (R/W)
14.7.14
CPU Address:h316
Accessed by CPU, serial interface (R/W)
INTP_MASK0 – Interrupt Mask for MAC Port 0,1
INTP_MASK1 – Interrupt Mask for MAC Port 2,3
INTP_MASK3 – Interrupt Mask for MAC Port 6,7
INTP_MASK2 – Interrupt Mask for MAC Port 4,5
INTP_MASK4 – Interrupt Mask for MAC Port 8,9
INTP_MASK5 – Interrupt Mask for MAC Port 10,11
INTP_MASK6 – Interrupt Mask for MAC Port 12,13
7
- 1: Mask the interrupt
- 0: Unmask the interrupt
6
5
P1
4
Zarlink Semiconductor Inc.
ZL50418
3
80
2
1
P0
0
Data Sheet