zl50415 Zarlink Semiconductor, zl50415 Datasheet - Page 96
zl50415
Manufacturer Part Number
zl50415
Description
Managed 16-port 10/100 M + 2-port 1 G Ethernet Switch
Manufacturer
Zarlink Semiconductor
Datasheet
1.ZL50415.pdf
(163 pages)
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14.9.38
I
Accessed by CPU, Serial Interface and I
14.9.39
I
Accessed by CPU, Serial Interface and I
14.9.40
The ZL50418 supports classifying packet priority through layer 4 logical port information. It can be setup by 8 Well
Known Ports, 8 User Defined Logical Ports and 1 User Defined Range. The 8 Well Known Ports supported are:
•
•
•
•
•
•
•
•
Their respective priority can be programmed via Well_Known_Port [7:0] priority register. Well_Known_Port_ Enable
can individually turn on/off each Well Known Port if desired.
Similarly, the User Defined Logical Port provides the user programmability to the priority, plus the flexibility to select
specific logical ports to fit the applications. The 8 User Logical Ports can be programmed via User_Port 0-7
registers. Two registers are required to be programmed for the logical port number. The respective priority can be
2
2
C Address 0FB, CPU Address 553
C Address 0FC, CPU Address 554
0:23
1:512
2:6000
3:443
4:111
5:22555
6:22
7:554
Bits [7:4]:
Bits[3:0]:
See Programming QoS Registers Application Note for more information.
Bits [7:4]:
Bits[3:0]:
See Programming QoS Registers Application Note for more information.
RDRC0 – WRED Rate Control 0
RDRC1 – WRED Rate Control 1
User Defined Logical Ports and Well Known Ports
7
X Rate
7
Z Rate
Corresponds to the frame drop percentage X% for WRED. Granularity 6.25%.
Corresponds to the frame drop percentage Y% for WRED. Granularity 6.25%.
Corresponds to the frame drop percentage Z% for WRED. Granularity 6.25%.
Corresponds to the best effort frame drop percentage B%, when shared pool is
all in use and destination port best effort queue reaches UCC. Granularity
6.25%.
4
4
c
2
C (R/W)
3
Y Rate
C (R/W)
3
B Rate
Zarlink Semiconductor Inc.
ZL50418
96
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