zl50415 Zarlink Semiconductor, zl50415 Datasheet - Page 83

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zl50415

Manufacturer Part Number
zl50415
Description
Managed 16-port 10/100 M + 2-port 1 G Ethernet Switch
Manufacturer
Zarlink Semiconductor
Datasheet
14.8.3
CPU Address h404
Accessed by CPU (R/W)
SCAN is used when fast learning is enabled (SE_OPMODE bit 0). It is used for setting up the report rate for newly
learned MAC addresses to the CPU.
Examples:
14.9
14.9.1
I
14.9.2
I
Accessed by CPU, serial interface and I
2
2
C Address h0AA; CPU Address:h500
C Address h0AB; CPU Address:h501
R= 0, Ratio = 0:
R= 0, Ratio = 1:
R= 1, Ratio = 7:
R= 0, Ratio = 7:
(Group 5 Address) Buffer Control/QOS Group
+SCAN – SCAN Control Register (default 00)
FCBAT – FCB Aging Timer
QOSC – QOS Control
Bit [6:0]:
Bit [7]:
Bit [7:0]:
Bit [0]:
7
R
7
7
Tos-d
6
Ratio
QoS frame lost is OK. Priority will be available for flow control enabled
source only when this bit is set (Default 0)
6
Tos-p
Aging and scanning in every other aging round
In eight rounds, one is used for scanning and seven are used for aging
In eight rounds, one is used for aging and seven are used for scanning
All rounds are used for aging. Never scan for new MAC addresses.
Ratio between database scanning and aging round (Default 00)
Reverse the ratio between scanning round and aging round (Default 0)
FCB Aging time. Unit of 1ms. (Default FF)
This is for buffer aging control. It is used to configure the buffer aging
time. This function can be enabled/disabled through bootstrap pin. It is
not suggested to use this function for normal operation.
5
PMCQ
FCBAT
2
C (R/W)
4
VF1c
Zarlink Semiconductor Inc.
ZL50418
3
83
1
0
0
0
L
Data Sheet

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