zl50415 Zarlink Semiconductor, zl50415 Datasheet - Page 132

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zl50415

Manufacturer Part Number
zl50415
Description
Managed 16-port 10/100 M + 2-port 1 G Ethernet Switch
Manufacturer
Zarlink Semiconductor
Datasheet
C29
D29
E29
B28
C28
D28
E28
A27
B27
C27
D27
C26
D26
D25
D24
Ball No(s)
TSTOUT0
TSTOUT1
TSTOUT2
TSTOUT3
TSTOUT4
TSTOUT5
TSTOUT6
TSTOUT7
TSTOUT8
TSTOUT9
TSTOUT10
TSTOUT11
TSTOUT12
TSTOUT13
TSTOUT14
Symbol
Zarlink Semiconductor Inc.
ZL50418
Default 1
Default 1
Recommend disable
(0) with pull-down
Default 1
Default 1
Default 1
Default 1
Default 1
Default 1
Default 1
Default 1
Default 1
Default 1
Default 1
132
I/O
GIGA Link polarity
0 – active low
1 – active high
RMII MAC Power Saving Enable
0 – No power saving
1 – power saving
Giga Half Duplex Support
0 - Disable
1 - Enable
Module detect enable
0 – Hot swap enable
1 – Hot swap disable
Reserved
Scan Speed: ¼ SCLK or SCLK
0 – ¼ SCLK (HPNA)
1 - SCLK
CPU Port Mode
0 - 8 bit Bus Mode
1 - 16 bit Bus Mode
Memory Size
0 - 256 K x 32 or 256 K x 64
1 - 128 K x 32 or 128 K x 64
EEPROM Installed
0 – EEPROM installed
1 – EEPROM not installed
MCT Aging
0 – MCT aging disable
1 – MCT aging enable
FCB Aging
0 - FCB aging disable
1 – FCB aging enable
Timeout Reset
0 – Time out reset disable
1 – Time out reset enable. Issue
reset if any state machine did not go
back to idle for 5sec.
Reserved
FDB RAM depth (1 or 2 layers)
0 – 2 layer
1 – 1 layer
CPU installed
0 – CPU installed
1 – CPU not installed
(4 M total)
(2 M total)
Description
Data Sheet

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