zl50415 Zarlink Semiconductor, zl50415 Datasheet - Page 45

• Manufacturer Part Number: zl50415
• Description: Managed 16-port 10/100 M + 2-port 1 G Ethernet Switch
• Manufacturer: Zarlink Semiconductor

11.2
An external CPLD logic is required to take the link signals and collision signals from the GPSI PHYS and shift them
into the switch device. The switch device will drive out a signature to indicate the start of the sequence. After that,
the CPLD should shift in the link and collision status of the PHYS as shown in the figure. The extra link status
indicates the polarity of the link signal. One indicates the polarity of the link signal is active high.
12.0
12.1
A serial output channel provides port status information from the ZL50418 chips. It requires three additional pins.
LED_CLK at 12.5 MHz
LED_SYN a sync pulse that defines the boundary between status frames
LED_DATA a continuous serial stream of data for all status LEDs that repeats once every frame time
A non-serial interface is also allowed, but in this case only the Gigabit ports will have status LEDs.
A low cost external device (44 pin PAL) is used to decode the serial data and to drive an LED array for display. This
device can be customized for different needs.
12.2
In the ZL50418, each port has 8 status indicators each represented by a single bit. The 8 LED status indicators are:
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Eight clocks are required to cycle through the eight status bits for each port.
Bit 0: Flow control
Bit 1:Transmit data
Bit 2: Receive dataBit 3: Activity (where activity includes either transmission or reception of data)
Bit 4: Link up
Bit 5: Speed (1= 100 Mb/s; 0= 10 Mb/s)
Bit 6: Full-duplex
Bit 7: Collision
scan_link/
scan_clk
scan_col
SCAN LINK and SCAN COL interface
LED Interface Introduction
Port Status
LED Interface
Figure 16 - SCAN LINK and SCAN COLLISON Status Diagram
Drived by ZL5041x
Zarlink Semiconductor Inc.
ZL50418
45
Total 32 cycles period
Drived by CPLD
25 cycles for link/
24 cycles for col
Data Sheet