zl50415 Zarlink Semiconductor, zl50415 Datasheet - Page 21

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zl50415

Manufacturer Part Number
zl50415
Description
Managed 16-port 10/100 M + 2-port 1 G Ethernet Switch
Manufacturer
Zarlink Semiconductor
Datasheet
4.0
4.1
The ZL50418 provides two 64-bit-wide SRAM banks, SRAM Bank A and SRAM Bank B with a 64-bit bus connected
to each. Each DMA can read and write from both bank A and bank B. The following figure provides an overview of
the ZL50418 SRAM banks.
4.2
Because the bus for each bank is 64 bits wide, frames are broken into 8-byte granules, written to and read from
memory. The first 8-byte granule gets written to Bank A, the second 8-byte granule gets written to Bank B, and so
on in alternating fashion. When reading frames from memory, the same procedure is followed, first from A, then
from B, and so on.
The reading and writing from alternating memory banks can be performed with minimal waste of memory
bandwidth. What’s the worst case? For any speed port, in the worst case, a 1-byte-long EOF granule gets written
to Bank A. This means that a 7-byte segment of Bank A bandwidth is idle, and furthermore, the next 8-byte
segment of Bank B bandwidth is idle, because the first 8 bytes of the next frame will be written to Bank A, not B.
This scenario results in a maximum 15 bytes of waste per frame, which is always acceptable because the
interframe gap is 20 bytes.
The CPU management port gets treated like any other port, reading and writing to alternating memory banks
starting with Bank A. The VLAN Index Mapping Table and Mac Address Table are duplicated in Bank A and B.
When the CPU writes an entry to the VLAN Index Mapping Table it has to write the same data in bank A and bank
B. Search engine data is written to both banks in parallel. In this way, a search engine read operation can be
performed by either bank at any time without a problem.
Overview
Detailed Memory Information
Memory Interface
Figure 6 - ZL50418 SRAM Interface Block Diagram (DMAs for 10/1000 Ports Only)
SRAM Bank A
TXDMA
0-7
TXDMA
8-15
Zarlink Semiconductor Inc.
ZL50418
SRAM Bank B
21
RXDMA
0-7
RXDMA
8-15
Data Sheet

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