zl50415 Zarlink Semiconductor, zl50415 Datasheet - Page 123

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zl50415

Manufacturer Part Number
zl50415
Description
Managed 16-port 10/100 M + 2-port 1 G Ethernet Switch
Manufacturer
Zarlink Semiconductor
Datasheet
AC29, AE28, AJ27,
AF27, AJ25, AF24,
AH23, AE19, AC27,
AF29, AG27, AF26,
AG25, AG23, AF23,
AG21, AC28, AF28,
AH27, AE27, AH25,
AE24, AF22, AF20,
AD29, AG28, AJ26,
AE26, AJ24, AE23,
AJ22, AJ20, AD27,
AH28, AG26, AE25,
AG24, AE22, AJ23,
AG20, AD28, AG29,
AH26, AF25, AH24,
AG22, AH22, AE17,
G27, H29, H28, H27,
J29, J28, U26, U25, V26,
V25, W26, W25, G26,
G25, H26, H25, J26,
J25, U27, V29, V28,
V27, W29, W28
Bootstrap Pins (Default = pull up, 1= pull up 0= pull down)
After reset TSTOUT0 to TSTOU15 are used by the LED interface.
C29
D29
E29
B28
C28
D28
E28
Ball No(s)
RESERVED
TSTOUT0
TSTOUT1
TSTOUT2
TSTOUT3
TSTOUT4
TSTOUT5
TSTOUT6
Symbol
Zarlink Semiconductor Inc.
ZL50418
123
NA
Default 1
Default 1
Default 1
Recommend disable (0)
with pull-down
Default 1
Default 1
Default 1
I/O
Reserved Pins. Leave
unconnected.
GIGA Link polarity
0 – active low
1 – active high
RMII MAC Power Saving
Enable
0 – No power saving
1 – power saving
Giga Half Duplex
Support
0 - Disable
1 - Enable
Module detect enable
0 – Hot swap enable
1 – Hot swap disable
Reserved
Scan Speed: ¼ SCLK or
SCLK
0 – ¼ SCLK (HPNA)
1 - SCLK
CPU Port Mode
0 - 8 bit Bus Mode
1 - 16 bit Bus Mode
Description
Data Sheet

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