ADSP-BF533 AD [Analog Devices], ADSP-BF533 Datasheet - Page 27

• Manufacturer Part Number: ADSP-BF533
• Description: Blackfin Embedded Processor
• Manufacturer: AD [Analog Devices]

Parallel Peripheral Interface Timing
Table 20
Interface operations.
Table 20. Parallel Peripheral Interface Timing
1
Parameter
Timing Requirements
t
t
t
t
t
t
Switching Characteristics - GP Output and Frame Capture Modes
t
t
t
t
PPI_CLK frequency cannot exceed f
PCLKW
PCLK
SFSPE
HFSPE
SDRPE
HDRPE
DFSPE
HOFSPE
DDTPE
HDTPE
and
Figure 15 on Page 27
PPI_CLK Width
PPI_CLK Period
External Frame Sync Setup Before PPI_CLK
External Frame Sync Hold After PPI_CLK
Receive Data Setup Before PPI_CLK
Receive Data Hold After PPI_CLK
Internal Frame Sync Delay After PPI_CLK
Internal Frame Sync Hold After PPI_CLK
Transmit Data Delay After PPI_CLK
Transmit Data Hold After PPI_CLK
SCLK
/2
1
describe Parallel Peripheral
PPI_CLK
PPI_FS2
PPI_FS1
PPIx
Figure 15. GP Output Mode and Frame Capture Timing
t
HOFSPE
t
HDTPE
Rev. 0 | Page 27 of 56 | March 2004
DRIVE
EDGE
t
t
DFSPE
DDTPE
t
PCLKW
ADSP-BF531/ADSP-BF532/ADSP-BF533
t
t
SDRPE
SFSPE
SAMPLE
EDGE
t
t
HFSPE
HDRPE
Min
6.0
15.0
3.0
3.0
2.0
4.0
0.0
0.0
Max
10.0
10.0
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns