ADSP-BF533 AD [Analog Devices], ADSP-BF533 Datasheet - Page 33

• Manufacturer Part Number: ADSP-BF533
• Description: Blackfin Embedded Processor
• Manufacturer: AD [Analog Devices]

Serial Peripheral Interface (SPI) Port
—Master Timing
Table 27
Table 27. Serial Peripheral Interface (SPI) Port—Master Timing
Parameter
Timing Requirements
t
Switching Characteristics
t
t
t
t
t
t
t
t
t
SSPIDM
SDSCIM
SPICHM
SPICLM
SPICLK
HDSM
SPITDM
DDSPIDM
HDSPIDM
HSPIDM
and
CPHA=1
CPHA=0
Figure 19
(OUTPUT)
(INPUT)
(INPUT)
(OUTPUT)
(CPOL = 0)
(CPOL = 1)
(OUTPUT)
SPISELx
(OUTPUT)
(OUTPUT)
MISO
MISO
MOSI
MOSI
SCK
SCK
Data Input Valid to SCK Edge (Data Input Setup)
SCK Sampling Edge to Data Input Invalid
SPISELx Low to First SCK edge (x=0 or 1)
Serial Clock High period
Serial Clock Low period
Serial Clock Period
Last SCK Edge to SPISELx High (x=0 or 1)
Sequential Transfer Delay
SCK Edge to Data Out Valid (Data Out Delay)
SCK Edge to Data Out Invalid (Data Out Hold)
describe SPI port master operations.
t
SSPIDM
t
SDSCIM
MSB VALID
t
SSPIDM
MSB
t
t
SPICHM
SPICLM
MSB VALID
t
Figure 19. Serial Peripheral Interface (SPI) Port—Master Timing
HSPIDM
t
t
t
DDSPIDM
MSB
SPICHM
SPICLM
t
Rev. 0 | Page 33 of 56 | March 2004
HSPIDM
t
DDSPIDM
ADSP-BF531/ADSP-BF532/ADSP-BF533
t
HDSPIDM
LSB VALID
t
t
SSPIDM
SPICLK
t
HDSPIDM
LSB VALID
LSB
t
HDSM
LSB
t
HSPIDM
Min
7.5
–1.5
2t
2t
2t
4t
2t
2t
0
–1.0
t
SPITDM
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
–1.5
–1.5
–1.5
–1.5
–1.5
–1.5
Max
6
4.0
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns