ADSP-BF533 AD [Analog Devices], ADSP-BF533 Datasheet - Page 41

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ADSP-BF533

Manufacturer Part Number
ADSP-BF533
Description
Blackfin Embedded Processor
Manufacturer
AD [Analog Devices]
Datasheet

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POWER DISSIPATION
Total power dissipation has two components: one due to inter-
nal circuitry (P
output drivers (P
internal circuitry (V
dent on the instruction execution sequence and the data
operands involved.
Table 32. Internal Power Dissipation
1
2
3
4
5
6
The external component of total power dissipation is caused by
the switching of output pins. Its magnitude depends on:
The external component is calculated using:
The frequency f includes driving the load high and then back
low. For example: DATA15–0 pins can drive high and low at a
maximum rate of 1/(2
A typical power consumption can now be calculated for these
conditions by adding a typical internal power dissipation:
Note that the conditions causing a worst-case P
those causing a worst-case P
while 100% of the output pins are switching from all ones (1s) to
all zeros (0s). Note, as well, that it is not common for an applica-
tion to have 100% or even 50% of the outputs switching
simultaneously.
Parameter
I
I
I
I
I
See EE-229: Estimating Power for ADSP-BF533 Blackfin Processors.
I
Processor executing 75% dual Mac, 25% ADD with moderate data bus activity.
See the ADSP-BF53x Blackfin Processor Hardware Reference Manual for defini-
Measured at V
Measured at V
DDTYP
DDSLEEP
DDDEEPSLEEP
DDHIBERNATE
DDRTC
DD
tions of Sleep and Deep Sleep operating modes.
• Number of output pins (O) that switch during each cycle
• Maximum frequency (f) at which they can switch
• Their load capacitance (C)
• Their voltage swing (V
data is specified for typical process parameters. All data at 25ºC.
3
6
4
4
5
DDEXT
DDRTC
INT
Test Conditions
f
50 MHz
V
0.8 V
26
16
14
50
30
P
CCLK
DDINT
TOTAL
EXT
= 3.65V with voltage regulator off (V
= 3.3V at 25ºC.
) and one due to the switching of external
P
).
DDINT
=
EXT
Table 32
=
=
t
=
f
400 MHz
V
1.2 V
160
37
31
SCLK
). Internal power dissipation is depen-
P
CCLK
DDINT
DDEXT
EXT
O
INT
) while in SDRAM burst mode.
shows the power dissipation for
. Maximum P
=
+
2
C
=
)
I
DD
V
f
500 MHz
V
1.2 V
190
37
31
CCLK
2
DDINT
DD
1
V
=
DDINT
=
f
INT
DDINT
EXT
cannot occur
f
600 MHz
V
1.2 V
220
37
31
CCLK
DDINT
differ from
Rev. 0 | Page 41 of 56 | March 2004
= 0V).
=
=
Unit
mA
mA
mA
A
A
ADSP-BF531/ADSP-BF532/ADSP-BF533

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