EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 115
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EZ80F91MCU
Manufacturer Part Number
EZ80F91MCU
Description
eZ80Acclaim-TM Flash Microcontrollers
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
1.EZ80F91MCU.pdf
(396 pages)
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PS019209-0504
Chip Select x Bus Mode Control Register
The Chip Select Bus Mode register, detailed in Table 29, configures the Chip
Select for eZ80, Z80, Intel™, or Motorola bus modes. Changing the bus mode
allows the eZ80F91 device to interface to peripherals based on the Z80-, Intel™-,
or Motorola-style asynchronous bus interfaces. When a bus mode other than
eZ80 is programmed for a particular Chip Select, the CSx_WAIT setting in that
Chip Select Control Register is ignored.
Table 29. Chip Select x Bus Mode Control Register
(CS0_BMC = 00F0h, CS1_BMC = 00F1h, CS2_BMC = 00F2h, CS3_BMC = 00F3h)
Bit
CS0_BMC Reset
CS1_BMC Reset
CS2_BMC Reset
CS3_BMC Reset
CPU Access
Note: R/W = Read/Write; R = Read Only.
Bit
Position
[7:6]
BUS_MODE
5
AD_MUX
4
Value Description
00
01
10
11
0
1
0
R/W
eZ80 bus mode.
Z80 bus mode.
Intel™ bus mode.
Motorola bus mode.
Separate address and data.
Multiplexed address and data—appears on data bus
DATA[7:0].
Reserved.
P R E L I M I N A R Y
7
0
0
0
0
R/W
6
0
0
0
0
R/W
5
0
0
0
0
R
4
0
0
0
0
R/W
3
0
0
0
0
Chip Selects and Wait States
Product Specification
R/W
2
0
0
0
0
eZ80F91 MCU
R/W
1
1
1
1
1
R/W
0
0
0
0
0
96
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