EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 257

• Manufacturer Part Number: EZ80F91MCU
• Description: eZ80Acclaim-TM Flash Microcontrollers
• Manufacturer: ZILOG [Zilog, Inc.]

PS019209-0504
I
The I2C_CCR register is a Write Only register. The seven LSBs control the fre-
quency at which the I
(SCL) when the I
share the same I/O addresses as the Read Only I2C_SR registers. See Table
130.
Table 130. I
(I2C_CCR = 00CCh)
The I
quency of this system clock is f
frequency f
In MASTER mode, the I
following equation:
The use of two separately-programmable dividers allows the MASTER mode out-
put frequency to be set independently of the frequency at which the I
sampled. This feature is particularly useful in multimaster systems because the
Bit
Reset
CPU Access
Note: W = Read only.
Bit
Position
7
[6:3]
M
[2:0]
N
2
C Clock Control Register
2
f
f
SAMP
SCL
C clocks are derived from the system clock of the eZ80F91 device. The fre-
=
2
SAMP
C Clock Control Registers
=
10 • (M + 1)(2)
f
SCLK
2
supplied by the following equation:
2
Value Description
0
0000–
1111
000–
111
C is in MASTER mode. The Write Only I2C_CCR registers
N
f
SCLK
2
C bus is sampled and the frequency of the I
2
C clock output frequency on SCL (f
W
Reserved.
I
I
P R E L I M I N A R Y
7
0
2
2
C clock divider scalar value.
C clock divider exponent.
N
SCK
W
6
0
. The I
W
5
0
2
C bus is sampled by the I
W
4
0
W
3
0
Product Specification
SCL
W
2
0
) is supplied by the
I
2
C Serial I/O Interface
2
2
eZ80F91 MCU
C clock line
C block at the
2
W
C bus is
1
0
W
0
0
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