EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 338

• Manufacturer Part Number: EZ80F91MCU
• Description: eZ80Acclaim-TM Flash Microcontrollers
• Manufacturer: ZILOG [Zilog, Inc.]

PS019209-0504
Usage
Boundary scan functionality is utilized by issuing the appropriate Test Access Port
(TAP) instruction and shifting data accordingly. Both of these steps are accom-
plished using the JTAG interface. To activate the TAP (see the
tion on page 312), the TCK pin must be driven Low at least two CPU system clock
cycles prior to the deassertion of the RESET pin. Otherwise, the OCI-JTAG fea-
tures are disabled.
As per the IEEE 1149.1 specification, the boundary scan cells capture system I/O
on the rising edge of TCK during the CAPTURE_DR state. This captured data is
shifted on the rising edge of TCK while in the SHIFT_DR state. Pins and logic
receive shifted data only when enabled, and only on the falling edge of TCK dur-
ing the UPDATE_DR state, after shifting is completed.
Refer to the Application Note titled Using BSDL Files with eZ80
eZ80Acclaim!™ Devices (AN0114) on the
about eZ80F91 boundary scan support.
Boundary Scan Instructions
The eZ80F91 device’s boundary scan architecture supports the following instruc-
tions:
•
•
•
•
•
BYPASS (required)
SAMPLE (required)
EXTEST (required)
PRELOAD (required)
IDCODE (optional)
P R E L I M I N A R Y
ZiLOG website
for more information
Product Specification
On-Chip Instrumentation
OCI Activation
®
and
eZ80F91 MCU
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