EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 157

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EZ80F91MCU

Manufacturer Part Number
EZ80F91MCU
Description
eZ80Acclaim-TM Flash Microcontrollers
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
PS019209-0504
Timer Control Register
The Timer x Control Register, detailed in Table 54, is used to control operation of
the timer, including enabling the timer, selecting the clock source, selecting the
clock divider, selecting between CONTINUOUS and SINGLEPASS modes, and
enabling the auto-reload feature.
Table 54. Timer Control Register
(TMR0_CTL = 0060h, TMR1_CTL = 0065h, TMR2_CTL = 006Fh, TMR3_CTL = 0074h)
Bit
Reset
CPU Access
Note: R = Read only; R/W = Read/Write.
Bit
Position
7
BRK_STOP
[6:5]
CLK_SEL
PWM Falling Edge Values
TMR3_PWM3F_H
TMRx_PWM3F_L
TMR3_PWM2F_H
TMR3_PWM2F_L
TMR3_PWM1F_H
TMR3_PWM1F_L
TMR3_PWM0F_H
TMR3_PWM0F_L
Value
0
1
00
01
10
11
Description
The timer continues to operate during debug break points.
The timer stops operation and holds count value during debug
break points.
Timer source is the system clock divided by the prescaler.
Timer source is the Real Time Clock Input.
Timer source is the Event Count (ECx) input—falling edge.
For Timer 1 this is EC0.
For Timer 2, this is EC1.
Timer source is the Event Count (ECx) input—rising edge.
For Timer 1 this is EC0.
For Timer 2, this is EC1.
R/W
P R E L I M I N A R Y
7
0
R/W
6
0
R/W
5
0
R/W
4
0
R/W
3
0
Programmable Reload Timers
Product Specification
R/W
2
0
eZ80F91 MCU
R/W
1
0
R/W
0
0
138

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