EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 370

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EZ80F91MCU

Manufacturer Part Number
EZ80F91MCU
Description
eZ80Acclaim-TM Flash Microcontrollers
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
PS019209-0504
Table 237. External Memory Write Timing
Parameter
T
T
T
T
T
T
T
T
T
T
* At the conclusion of a Write cycle, deassertion of WR always occurs before any
change to ADDR, DATA, CSx, or MREQ.
1
2
3
4
5
6
7
8
9
10
Abbreviation
PHI Clock Rise to ADDR Valid Delay
PHI Clock Rise to ADDR Hold Time
PHI Clock Fall to Output DATA Valid Delay
PHI Clock Rise to DATA Hold Time
PHI Clock Rise to CSx Assertion Delay
PHI Clock Rise to CSx Deassertion Delay
PHI Clock Rise to MREQ Assertion Delay
PHI Clock Rise to MREQ Deassertion Delay
PHI Clock Fall to WR Assertion Delay
PHI Clock Rise to WR Deassertion Delay*
WR Deassertion to ADDR Hold Time
WR Deassertion to DATA Hold Time
WR Deassertion to CSx Hold Time
WR Deassertion to MREQ Hold Time
P R E L I M I N A R Y
Product Specification
Electrical Characteristics
2.2
2.3
2.6
2.4
2.6
2.3
1.8
1.6
0.4
0.5
1.2
0.5
Min.
eZ80F91 MCU
Delay (ns)
6.8
7.5
10.8
8.8
7.0
6.3
4.5
4.4
Max.
351

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