HD6433308 HITACHI [Hitachi Semiconductor], HD6433308 Datasheet - Page 71

• Manufacturer Part Number: HD6433308
• Description: Hitachi Single-Chip MicroComputer
• Manufacturer: HITACHI [Hitachi Semiconductor]

3.7.2 Access to On-Chip Register Field and External Devices
The on-chip register field (I/O ports, dual-port RAM, on-chip supporting module registers, etc.) and
external devices are accessed in a cycle consisting of three states: T
data can be accessed per cycle, via an 8-bit data bus. Access to word data or instruction codes
requires two consecutive cycles (six states).
Wait States: If requested, additional wait states (T
pin is sampled at the center of state T
is also sampled at the center of each wait state and if it is still Low, another wait state is inserted.
An external device can have any number of wait states inserted by holding WAIT Low for the
necessary duration.
The bus cycle for the MOVTPE and MOVFPE instructions will be described in section 15,
"E-Clock Interface."
Figure 3-15 shows the access cycle for the on-chip register field. Figure 3-16 shows the associated
pin states. Figures 3-17 (a) and (b) show the read and write access timing for external devices.
Internal address bus
Internal Read signal
Internal data bus (read)
Internal Write signal
Internal data bus (write)
Ø
Figure 3-15. On-Chip Register Field Access Cycle
2
. If it is Low, a wait state is inserted after T
T1 state
55
W
) are inserted between T
Bus cycle
T2 state
Address
Read data
Write data
1
, T
2
, and T
T3 state
2
and T
3
. Only one byte of
2
. The WAIT pin
3
. The WAIT