ATMEGA48V_11 ATMEL [ATMEL Corporation], ATMEGA48V_11 Datasheet - Page 200

• Manufacturer Part Number: ATMEGA48V_11
• Description: 8-bit Atmel Microcontroller with 4/8/16K Bytes In-System Programmable Flash
• Manufacturer: ATMEL [ATMEL Corporation]

21.4
2545T–AVR–05/11
SPI data modes and timing
Table 21-1.
Note:
There are four combinations of XCKn (SCK) phase and polarity with respect to serial data, which
are determined by control bits UCPHAn and UCPOLn. The data transfer timing diagrams are
shown in
the XCKn signal, ensuring sufficient time for data signals to stabilize. The UCPOLn and
UCPHAn functionality is summarized in
these bits will corrupt all ongoing communication for both the Receiver and Transmitter.
Table 21-2.
Operating mode
Synchronous Master
mode
UCPOLn
BAUD
f
UBRRn
OSC
0
0
1
1
1. The baud rate is defined to be the transfer rate in bit per second (bps).
Figure 21-1 on page
Equations for calculating baud rate register setting.
UCPOLn and UCPHAn functionality.
UCPHAn
Baud rate (in bits per second, bps)
System Oscillator clock frequency
Contents of the UBRRnH and UBRRnL Registers, (0-4095)
0
1
0
1
Equation for calculating baud
BAUD
201. Data bits are shifted out and latched in on opposite edges of
SPI mode
=
0
1
2
3
rate
-------------------------------------- -
2 UBRRn
(
Table
(1)
f
OSC
Leading edge
Sample (rising)
Setup (rising)
Sample (falling)
Setup (falling)
21-2. Note that changing the setting of any of
+
1
)
ATmega48/88/168
Equation for calculating UBRRn
UBRRn
Trailing edge
Setup (falling)
Sample (falling)
Setup (rising)
Sample (rising)
value
=
------------------- - 1
2BAUD
f
OSC
–
200