ATMEGA48V_11 ATMEL [ATMEL Corporation], ATMEGA48V_11 Datasheet - Page 208

• Manufacturer Part Number: ATMEGA48V_11
• Description: 8-bit Atmel Microcontroller with 4/8/16K Bytes In-System Programmable Flash
• Manufacturer: ATMEL [ATMEL Corporation]

21.8.5
2545T–AVR–05/11
USART MSPIM baud rate registers - UBRRnL and UBRRnH
• Bit 5:3 - Reserved bits in MSPI mode
When in MSPI mode, these bits are reserved for future use. For compatibility with future devices,
these bits must be written to zero when UCSRnC is written.
• Bit 2 - UDORDn: Data order
When set to one the LSB of the data word is transmitted first. When set to zero the MSB of the
data word is transmitted first. Refer to section
• Bit 1 - UCPHAn: Clock phase
The UCPHAn bit setting determine if data is sampled on the leasing edge (first) or tailing (last)
edge of XCKn. Refer to the
• Bit 0 - UCPOLn: Clock polarity
The UCPOLn bit sets the polarity of the XCKn clock. The combination of the UCPOLn and
UCPHAn bit settings determine the timing of the data transfer. Refer to the
timing” on page 200
The function and bit description of the baud rate registers in MSPI mode is identical to normal
USART operation.
See “UBRRnL and UBRRnH – USART baud rate registers” on page 194.
for details.
“SPI data modes and timing” on page 200
“Frame formats” on page 175
ATmega48/88/168
for details.
“SPI data modes and
for details.
208