RG82845M Intel, RG82845M Datasheet - Page 104

• Manufacturer Part Number: RG82845M
• Description: Chipset Memory Controller Hub Mobile
• Manufacturer: Intel

Intel
3.8.24.
104
®
82845MP/82845MZ Chipset-Mobile (MCH-M)
Offset:
Size:
DRTMC – DRAM Read Thermal Management Control
Default:
Access:
63:49
48:41
40:28
27:22
21:15
14:3
2:1
0
Bit
Reserved
Global DRAM Read Sampling Window (GDRSW): This eight bit value is multiplied by 4*10
define the length of time in host clocks over which the number of hexwords read from the DRAM is
counted. If the number of hexwords read during this window exceeds the Global Read Hexword
Threshold (GRHT) defined below, then the thermal management mechanism will be invoked.
Global Read Hexword Threshold (GRHT): The thirteen-bit value held in this field is multiplied by 2
to arrive at the number of hexwords that must be written within the Global DRAM Read Sampling
Window(GDRSW) in order to cause the thermal management mechanism to be invoked.
Read Thermal Management Time (RTMT): This value provides a multiplier between 0 and 63 which
specifies how long thermal management remains in effect as a number of Global DRAM Read
Sampling Windows. For example, if GDRSW is programmed to 1000_0000b and WTT is set to
01_0000b, then thermal management will be performed for 8192*10
seconds once invoked (128 * 4*10
Read Thermal Management Monitoring Window (RTMMW): The value in this register is padded
with 4 0’s to specify a window of 0-2047 host clocks with 16 clock granularity. While the thermal
management mechanism is invoked, DRAM reads are monitored during this window. If the number of
hexwords read during the window reaches the Write Thermal Management Hexword Maximum, then
read requests are blocked for the remainder of the window.
Read Thermal Management Hexword Maximum (RTMHM): The Read Thermal Management
Hexword Maximum defines the maximum number of hexwords between 0-4095, which are permitted
to be read to DRAM within one Write Thermal Management Monitoring Window.
Read Thermal Management Mode (RTMMode):
START Read Thermal Management (SRTM): When this bit is set to ‘1’ read thermal management
begins based on the settings in RTMW and RTHM, and remains to be in effect until this bit is reset to
‘0’. When this bit is reset to ‘0’, read thermal management stops and the counters associated with
RTMW and RTHM are reset. Software writes to this bit to start and stop read thermal management.
00
01
10
11
Thermal management via Counters and Hardware Thermal Management_on signal
mechanisms disabled.
Hardware Thermal Management_on signal mechanism is enabled. In this mode, as
long as the Thermal Management_on signal is asserted, write thermal management is in
effect based on the settings in RTMW and RTHM. When the Thermal Management_on
signal is de-asserted, read thermal management stops and the counters associated with
the RTMW and RTHM are reset. When the hardware Thermal Management_on signal
mechanism is not enabled, the Thermal Management_on signal has no effects.
Counter mechanism controlled through GDRSW and GRHT is enabled. When the
threshold set in GDRSW and GRHT is reached, thermal management start/stop cycles
occur based on the settings in RTMT, RTMMW and RTMHM.
Reserved
58h-5Fh
0000_0000_0000_0000h
Read/Write/Lock
64 bits
Datasheet
5
host clocks * 16).
Description
5
host clocks (at 100 MHz)
250687-002
5
to
15
R