RG82845M Intel, RG82845M Datasheet - Page 109

• Manufacturer Part Number: RG82845M
• Description: Chipset Memory Controller Hub Mobile
• Manufacturer: Intel

4.1.5.
4.1.6.
4.1.7.
4.1.8.
250687-002
R
System Bus Interrupt APIC Memory Space
The System Bus interrupt space is the address used to deliver interrupts to the system bus. Any device on
AGP or hub interface, D, E may issue a Memory Write to 0FEEx_xxxxh. The MCH-M will forward this
Memory Write along with the data to the system bus as an Interrupt Message Transaction. The MCH-M
terminates the system bus transaction by providing the response and asserting TRDY#. This Memory
Write cycle does not go to DRAM.
High SMM Memory Space
The HIGHSMM space allows cacheable access to the compatible SMM space by re-mapping valid SMM
accesses between 0_FEDA_0000 and 0_FEDB_FFFF to accesses between 0_000A_0000 and
0_000B_FFFF. The accesses are remapped when SMRAM space is enabled, an appropriate access is
detected on the system bus, and when ESMRAMC.H_SMRAME allows access to high SMRAM space.
SMM memory accesses from any hub interface or AGP are specially terminated: reads are provided with
the value from address 0 while writes are ignored entirely.
AGP Aperture Space (Device #0 BAR)
Processors and AGP devices communicate through a special buffer called the “graphics aperture”. This
aperture acts as a window into the main DRAM memory and is defined by the APBASE and APSIZE
configuration registers of the Intel 845MP/845MZ Chipset MCH-M. Note that the AGP aperture must be
above the top of memory and must not intersect with any other address space.
AGP Memory and Prefetchable Memory
Plug-and-play software configures the AGP memory window in order to provide enough memory space
for the devices behind this PCI-to-PCI bridge. Accesses whose addresses fall within this window are
decoded and forwarded to AGP for completion. Note that these registers must be programmed with
values that place the AGP memory space window between the value in the TOM register and 4 GB. In
addition, neither region should overlap with any other fixed or relocatable area of memory.
SBINTR
HIGHSMM
AGPAPP
M1
PM1
From
From
From
From
Datasheet
0_FEE0_0000
0_FEDA_0000
APBASE
MBASE1
PMBASE1
Intel
®
82845MP/82845MZ Chipset-Mobile (MCH-M)
To
To
To
To
0_FEEF_FFFF
0_FEDB_FFFF
APBASE + APSIZE
MLIMIT1
PMLIMIT1
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