RG82845M Intel, RG82845M Datasheet - Page 92

• Manufacturer Part Number: RG82845M
• Description: Chipset Memory Controller Hub Mobile
• Manufacturer: Intel

Intel
3.8.10.
3.8.11.
3.8.12.
92
®
82845MP/82845MZ Chipset-Mobile (MCH-M)
Offset:
Offset:
Offset:
PBUSN1 – Primary Bus Number Register – Device #1
Default:
Access:
Size:
This register identifies that “virtual” PCI-PCI Bridge is connected to bus #0.
SBUSN1 – Secondary Bus Number Register – Device #1
Default:
Access:
Size:
This register identifies the bus number assigned to the second bus side of the “virtual” PCI-PCI bridge
i.e. to AGP. This number is programmed by the PCI configuration software to allow mapping of
configuration cycles to AGP.
SUBUSN1 – Subordinate Bus Number Register – Device #1
Default:
Access:
Size:
This register identifies the subordinate bus (if any) that resides at the level below AGP. This number is
programmed by the PCI configuration software to allow mapping of configuration cycles to AGP.
7:0
7:0
7:0
Bit
Bit
Bit
Bus Number. Hardwired to “0.”
Bus Number. Programmable. Default = “00h”.
Bus Number. Programmable. Default = “00h”.
18h
00h
Read Only
8 bits
19h
00h
Read /Write
8 bits
1Ah
00h
Read /Write
8 bits
Datasheet
Descriptions
Descriptions
Descriptions
250687-002
R