S71PL032J SPANSION [SPANSION], S71PL032J Datasheet - Page 103

• Manufacturer Part Number: S71PL032J
• Description: STACKED MULTI CHIP PRODUCT FLASH MEMORY AND RAM
• Manufacturer: SPANSION [SPANSION]

Notes:
1. Standby mode is supposed to be set up after at least one active operation after power up. ISB1 is measure after 60ms from
AC Operating Conditions
Note: Including scope and jig capacitance.
May 3, 2004 pSRAM_Type02_15A0
Average Operating
Current
Standby Current (CMOS)
the time when standby mode is set up.
64M pSRAM
Test Conditions (Test Load and Test Input/Output Reference)
Item
Input pulse level: 0.4 to 2.2V
Input rising and falling time: 5ns
Input and output reference voltage: 1.5V
Output load (See Figure 25): CL=50pF
I
A d v a n c e
CC2
I
SB1
Symbol
I
(Note 1)
CC1
Async
Page
Figure 25. Output Load
Dout
I n f o r m a t i o n
Cycle time=1µs, 100% duty, I
CS2≥V
Cycle time=Min, I
CS1#=V
V
Cycle time=t
CS1#=V
V
Other inputs=0-VCC
1. CS1# ≥ V
controlled) or
2. 0V ≤ CS2 ≤ 0.2V (CS2 controlled)
CS1#≤0.2V, LB#≤0.2V and/or UB#≤0.2V,
C
IN
IN
Type 2 pSRAM
L
=V
-V
IH
IH
CC
or V
IL
IL
-0.2V, V
or V
, CS2=V
, CS2=V
CC
IL
IL
RC
- 0.2, CS2 ≥ V
+3t
Test Conditions
IN
IO
≤0.2V or V
IH
IH
PC
=0mA, 100% duty,
, I
LB#=V
LB#=V
IO
=0mA, 100% duty,
IL
IL
CC
IN
and/or UB#=V
and/or UB#=V
IO
≥VCC-0.2V
- 0.2V (CS1#
=0mA,
IL
IL
,
,
Min Typ Max Unit
—
—
—
—
—
—
TBD mA
TBD mA
TBD mA
TBD mA
103