S71PL032J SPANSION [SPANSION], S71PL032J Datasheet - Page 160

• Manufacturer Part Number: S71PL032J
• Description: STACKED MULTI CHIP PRODUCT FLASH MEMORY AND RAM
• Manufacturer: SPANSION [SPANSION]

Notes:
1. CS1 controlled:CS1# ≥ V
Notes:
1. CS1 controlled:CS1# ≥ V
Notes:
1. CS1 controlled:CS1# ≥ V
160
V
Data retention current
Data retention set-up time
Recovery time
V
Data retention current
Data retention set-up time
Recovery time
V
Data retention current
Data retention set-up time
Recovery time
Figure 80. Timing Waveform of Read Cycle(1) (Address Controlled, CS#1=OE#=V
CC
CC
CC
for data retention
for data retention
for data retention
Data Retention Characteristics (4M Version G)
Data Retention Characteristics (8M Version C)
Data Retention Characteristics (8M Version D)
Timing Diagrams
Data Out
Address
Item
Item
Item
CC
CC
Previous Data Valid
CC
-0.2V. CS2 controlled: CS2 ≤ 0.2V.
-0.2V. CS2 controlled: CS2 ≤ 0.2V.
Symbol
Symbol
Symbol
t
t
t
t
t
t
V
V
V
I
I
I
-0.2V. CS2 controlled: CS2 ≤ 0.2V.
SDR
RDR
SDR
RDR
SDR
RDR
DR
DR
DR
DR
DR
DR
CS1# ≥ V
V
See data retention waveform
CS1# ≥ V
V
See data retention waveform
CS1# ≥ V
V
See data retention waveform
CC
CC
CC
=1.5V, CS1# ≥ V
=3.0V, CS1# ≥ V
=3.0V, CS1# ≥ V
CC
CC
CC
A d v a n c e
-0.2V (Note 1), V
-0.2V (Note 1). BYTE# = V
-0.2V (Note 1), BYTE# = V
t
OH
and/or LB#=V
CC
CC
CC
Test Condition
Test Condition
Test Condition
SRAM
t
AA
-0.2V (Note 1), V
-0.2V (Note 1)
-0.2V (Note 1)
IN
I n f o r m a t i o n
t
RC
IL
≥ 0V. BYTE# = V
)
SS
SS
IN
or V
or V
≥ 0V
CC
CC
SS
or V
Data Valid
CC
IL
Min
Min
Min
1.5
1.5
1.5
t
t
t
RC
RC
RC
0
0
0
, CS2=WE#=V
-
-
-
SRAM_Type01_02A0 June 15, 2004
Typ
Typ
Typ
-
-
-
-
-
-
-
-
-
-
-
-
TBD
Max
Max
Max
3.3
3.3
3.3
15
3
IH
-
-
-
-
-
-
, UB#
Unit
Unit
Unit
µA
ns
µA
ns
µA
ns
V
V
V