S71PL032J SPANSION [SPANSION], S71PL032J Datasheet - Page 159

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S71PL032J

Manufacturer Part Number
S71PL032J
Description
STACKED MULTI CHIP PRODUCT FLASH MEMORY AND RAM
Manufacturer
SPANSION [SPANSION]
Datasheet

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Notes:
1. CS1 controlled:CS1# ≥ V
2. Typical values are not 100% tested.
June 15, 2004 SRAM_Type01_02A0
V
Data retention current
Data retention set-up time
Recovery time
CC
for data retention
Data Retention Characteristics (4M Version F)
Item
Write cycle time
Chip select to end of write
Address set-up time
Address valid to end of write
LB#, UB# valid to end of write
Write pulse width
Write recovery time
Write to output high-Z
Data to write time overlap
Data hold from write time
End write to output low-Z
CC
-0.2V. CS2 controlled: CS2 ≤ 0.2V.
Symbol
Parameter List
A d v a n c e
t
t
V
I
SDR
RDR
DR
DR
CS1# ≥ V
V
See data retention waveform
CC
=3.0V, CS1# ≥ V
CC
I n f o r m a t i o n
-0.2V (Note 1), V
CC
Test Condition
SRAM
-0.2V (Note 1), V
Symbol
IN
t
t
t
t
t
t
t
t
t
t
t
WHZ
DW
OW
WC
CW
AW
BW
WP
WR
DH
AS
≥ 0V. BYTE# = V
IN
≥ 0V
Min
70
60
60
60
50
30
0
0
0
0
5
SS
Speed Bins
or V
70ns
CC
Max
20
-
-
-
-
-
-
-
-
-
-
Min
1.5
t
RC
0
-
(Note 2)
Units
Typ
1.0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
-
-
-
Max
3.3
10
-
-
Unit
µA
ns
159
V

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