S3C72G9 Samsung semiconductor, S3C72G9 Datasheet - Page 29
S3C72G9
Manufacturer Part Number
S3C72G9
Description
The S3C72G9 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrangeable M
Manufacturer
Samsung semiconductor
Datasheet
1.S3C72G9.pdf
(96 pages)
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AND
Operation:
Description:
Example:
dst,src
A,#im
A,@HL
EA,RR
RRb,EA
The source operand is logically ANDed with the destination operand. The result is stored in the
destination. The logical AND operation results in a "1" whenever the corresponding bits in the two
operands are both "1"; otherwise a "0" is stored in the corresponding destination bit. The contents
of the source are unaffected.
A,#im
A,@HL
EA,RR
RRb,EA
If the extended accumulator contains the value 0C3H (11000011B) and register pair HL the value
55H (01010101B), the instruction
AND
leaves the value 41H (01000001B) in the extended accumulator EA .
Operand
Operand
EA,HL
Logical-AND A immediate data to A
Logical-AND A indirect data memory to A
Logical-AND register pair (RR) to EA
Logical-AND EA to register pair (RRb)
1
0
0
1
0
1
0
1
0
0
1
0
1
0
0
0
1
0
0
0
0
Binary Code
Operation Summary
1
1
1
1
1
1
1
d3
1
1
1
1
1
0
d2
r2
r2
0
1
1
1
d1
r1
r1
0
0
0
0
d0
1
1
0
0
0
0
A
A
EA
RRb
A AND im
A AND (HL)
EA AND RR
Operation Notation
RRb AND EA
Bytes
2
1
2
2
Cycles
2
1
2
2
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