S3C72G9 Samsung semiconductor, S3C72G9 Datasheet - Page 44
S3C72G9
Manufacturer Part Number
S3C72G9
Description
The S3C72G9 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrangeable M
Manufacturer
Samsung semiconductor
Datasheet
1.S3C72G9.pdf
(96 pages)
- Current page: 44 of 96
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BXOR
Operation:
Description:
Examples:
C,src.b
C,mema.b
C,memb.@L
C,@H+DA.b
The specified bit of the source is logically XORed with the carry bit value. The resultant bit is
written to the carry flag. The source value is unaffected.
C,mema.b
C,memb.@L
C,@H+DA.b
1. The carry flag is logically XORed with the P1.0 value:
2. The P1 address is FF1H and register L contains the value 1H (0001B). The address (memb.7-
Operand
Operand
RCF
BXOR
2) is 111100B and (L.3-2) = 00B. The resulting address is 11110000B or FF0H, specifying P0.
The bit value for the BXOR instruction, (L.1-0) is 01B which specifies bit 1. Therefore, P1.@L
= P0.1:
LD
BXOR
mema.b
Exclusive-OR carry with memory bit
C,P1.0
L,#0001B
C,P0.@L
1
1
0
1
0
1
1
1
1
1
1
0
0
1
b1
b1
b1
1
1
0
1
Second Byte
Binary Code
Operation Summary
b0
b0
b0
1
1
0
1
; C
; If P1.0 = "1", then C
; P1.@L is specified as P0.1; C XOR P0.1
a5
a3
a3
a3
0
0
0
a4
a2
a2
a2
1
1
1
"0"
a3
a1
a1
a1
1
1
1
a2
a0
a0
a0
1
1
1
C
C
[L.1-0]
C
FB0H-FBFH
FF0H-FFFH
"1"; if P1.0 = "0", then C
C XOR mema.b
C XOR [H + DA.3-0].b
C XOR [memb.7-2 + L.3-2].
Operation Notation
Bit Addresses
Bytes
2
2
2
Cycles
2
2
2
"0"
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