S3C72G9 Samsung semiconductor, S3C72G9 Datasheet - Page 51

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S3C72G9

Manufacturer Part Number
S3C72G9
Description
The S3C72G9 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrangeable M
Manufacturer
Samsung semiconductor
Datasheet
 
 
DECS
Operation:
Description:
Examples:
dst
The destination is decremented by one. An original value of 00H will underflow to 0FFH. If a
borrow occurs, a skip is executed. The carry flag value is unaffected.
1. Register pair HL contains the value 7FH (01111111B). The following instruction leaves the
2. Register A contains the value 0H. The following instruction sequence leaves the value 0FFH
Operand
Operand
value 7EH in register pair HL:
DECS
in register A. Since a "borrow" occurs, the 'CALL PLAY1' instruction is skipped and the 'CALL
PLAY2' instruction is executed:
DECS
CALL
CALL
RR
RR
R
R
Decrement register (R); skip on borrow
Decrement register pair (RR); skip on borrow
HL
A
PLAY1
PLAY2
0
1
1
1
1
1
0
0
0
Binary Code
Operation Summary
0
1
1
; "Borrow" occurs
; Skipped
; Executed
1
1
1

r2
r2
1
r1
r1
0
r0
0
0
R
RR
R-1; skip on borrow
RR-1; skip on borrow
Operation Notation
   
Bytes
1
2
Cycles
1 + S
2 + S


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