S3C72G9 Samsung semiconductor, S3C72G9 Datasheet - Page 65

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S3C72G9

Manufacturer Part Number
S3C72G9
Description
The S3C72G9 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrangeable M
Manufacturer
Samsung semiconductor
Datasheet
 

LD
Examples:

(Concluded)
Instruction
LD EA,@HL
LD EA,DA
LD EA,RRb
LD @HL,A
LD DA,EA
LD RRb,EA
LD @HL,EA
Load data memory contents pointed to by 8-bit register HL to the A register, and
the contents of HL+1 to the E register. The contents of register L must be an
even number. If the number is odd, the LSB of register L is recognized as a
logic zero (an even number), and it is not replaced with the true value. For
example, 'LD HL,#36H' loads immediate 36H to HL and the next instruction 'LD
EA,@HL' loads the contents of 36H to register A and the contents of 37H to
register E.
Load direct data memory contents of DA to the A register, and the next direct
data memory contents of DA + 1 to the E register. The DA value must be an
even number. If it is an odd number, the LSB of DA is recognized as a logic
zero (an even number), and it is not replaced with the true value. For example,
'LD EA,37H' loads the contents of 36H to the A register and the contents of
37H to the E register.
Load 8-bit RRb register (HL, WX, YZ) to the EA register. H, W, and Y register
values are loaded into the E register, and the L, X, and Z values into the A
register.
Load A register contents to data memory location pointed to by the 8-bit HL
register value.
Load the A register contents to direct data memory and the E register contents
to the next direct data memory location. The DA value must be an even
number. If it is an odd number, the LSB of the DA value is recognized as logic
zero (an even number), and is not replaced with the true value.
Load contents of EA to the 8-bit RRb register (HL, WX, YZ). The E register is
loaded into the H, W, and Y register and the A register into the L, X, and Z
register.
Load the A register to data memory location pointed to by the 8-bit HL register,
and the E register contents to the next location, HL + 1. The contents of the L
register must be an even number. If the number is odd, the LSB of the L
register is recognized as logic zero (an even number), and is not replaced with
the true value. For example, 'LD HL,#36H' loads immediate 36H to register HL;
the instruction 'LD @HL,EA' loads the contents of A into address 36H and the
contents of E into address 37H.
Operation Description and Guidelines
   


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