S3C72G9 Samsung semiconductor, S3C72G9 Datasheet - Page 75

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S3C72G9

Manufacturer Part Number
S3C72G9
Description
The S3C72G9 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrangeable M
Manufacturer
Samsung semiconductor
Datasheet
 
 
POP
Operation:
Description:
Example:
dst
RR
SB
The contents of the RAM location addressed by the stack pointer is read, and the SP is
incremented by two. The value read is then transferred to the variable indicated by the destination
operand.
RR
SB
The SP value is equal to 0EDH, and RAM locations 0EFH through 0EDH contain the values 2H,
3H, and 4H, respectively. The instruction
POP
leaves the stack pointer set to 0EFH and the data pointer pair HL set to 34H.
Operand
Operand
HL
Pop to register pair from stack
Pop SMB and SRB values from stack

0
1
0
0
1
1
1
0
1
Binary Code
Operation Summary
0
1
0
1
1
0
r2
1
1
r1
0
1
0
1
0
RR
SP
(SRB)
SP
SP+2
SP+2
(SP), RR
Operation Notation
(SP), SMB
   
Bytes
1
2
(SP+1)
(SP+1),
Cycles
1
2


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