S3C72G9 Samsung semiconductor, S3C72G9 Datasheet - Page 53

• Manufacturer Part Number: S3C72G9
• Description: The S3C72G9 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrangeable M
• Manufacturer: Samsung semiconductor

 

EI
Operation:
Description:
Example:
Bit 3 of the interrupt priority register IPR (IME) is set to logic one. This allows all interrupts to be
serviced when they occur, assuming they are enabled. If an interrupt's status latch was previously
enabled by an interrupt, this interrupt can also be serviced.
If the IME bit (bit 3 of the IPR) is logic zero (e.g., all instructions are disabled), the instruction
EI
sets the IME bit to logic one, enabling all interrupts.
Operand
Operand
-
-


Enable all interrupts
1
1
1
0
1
1
Binary Code
Operation Summary
1
1
1
0
1
0
1
1
1
0
IM
1
Operation Notation

 


Bytes
2
Cycles
2