S3C72G9 Samsung semiconductor, S3C72G9 Datasheet - Page 89

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S3C72G9

Manufacturer Part Number
S3C72G9
Description
The S3C72G9 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrangeable M
Manufacturer
Samsung semiconductor
Datasheet
 
 
SRET
Operation:
Description:
Example:
SP + 1
SP + 2
SP + 3
SP + 4
SP + 5
SP + 6
SP
SRET is normally used to return to the previously executing procedure at the end of a subroutine
that was initiated by a CALL, LCALL or CALLS instruction. SRET skips the resulting address,
which is generally the instruction immediately after the point at which the subroutine was called.
Then, program execution continues from the resulting address and the contents of the location
addressed by the stack pointer are popped into the program counter.
If the stack pointer contains the value 0FAH and RAM locations 0FAH, 0FBH, 0FCH, and 0FDH
contain the values 1H, 0H, 5H, and 2H, respectively, the instruction
SRET
leaves the stack pointer with the value 00H and the program returns to continue execution at
location 0125H, then skips unconditionally.
During a return from subroutine, data is popped from the stack to the PC as follows:
(0FAH)
(0FBH)
(0FCH)
(0FDH)
(0FEH)
(0FFH)
(000H)
Operand
Operand
0
0
0
Return from subroutine and skip
1
PC14
PC11 - PC8
PC3 - PC0
PC7 - PC4
0
0
1
PC13
EMB
1
0
Binary Code
Operation Summary
0
PC12
ERB
0
0

1
0
1
PC14-8
PC7-0
EMB,ERB
SP
SP+6
Operation Notation
(SP+3) (SP+2)
(SP+1) (SP)
   
(SP+5) (SP+4)
Bytes
1
Cycles
3 + S


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