S3C72G9 Samsung semiconductor, S3C72G9 Datasheet - Page 3

• Manufacturer Part Number: S3C72G9
• Description: The S3C72G9 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrangeable M
• Manufacturer: Samsung semiconductor

 
REDUCING INSTRUCTION REDUNDANCY
When redundant instructions such as LD A,#im and LD EA,#imm are used consecutively in a program sequence,
only the first instruction is executed. The redundant instructions which follow are ignored, that is, they are handled
like a NOP instruction. When LD HL,#imm instructions are used consecutively, redundant instructions are also
ignored.
In the following example, only the 'LD A, #im' instruction will be executed. The 8-bit load instruction which follows it
is interpreted as redundant and is ignored:
In this example, the statements 'LD A,#2H' and 'LD A,#3H' are ignored:
If consecutive LD HL, #imm instructions (load 8-bit immediate data to the 8-bit memory pointer pair, HL) are
detected, only the first LD is executed and the LDs which immediately follow are ignored. For example,
If an instruction reference with a REF instruction has a redundancy effect, the following conditions apply:
— If the instruction preceding the REF has a redundancy effect, this effect is cancelled and the referenced
— If the instruction following the REF has a redundancy effect, the instruction following the REF is skipped.
ABC
instruction is not skipped.
PROGRAMMING TIP — Example of the Instruction Redundancy Effect
LD
LD
BITR
LD
LD
LD
LD
LD
LD
LD
LD
LD
ORG
LD
ORG



LD
REF



REF
LD
A,#im
EA,#imm
EMB
A,#1H
A,#2H
A,#3H
23H,A
HL,#10H
HL,#20H
A,#3H
EA,#35H
@HL,A
0020H
EA,#30H
0080H
EA,#40H
ABC
ABC
EA,#50H
; Execute instruction
; Ignore, redundant instruction
; Skip
; Load 4-bit immediate data (#im) to accumulator
; Load 8-bit immediate data (#imm) to extended
; accumulator
; Ignore, redundant instruction
; Ignore, redundant instruction
; Execute instruction, 023H
; HL
; A
; Ignore, redundant instruction
; (10H)
; Stored in REF instruction reference area
; Redundancy effect is encountered
; No skip (EA
; EA
3H
10H
#30H
3H
#30H)
#1H