S3C72G9 Samsung semiconductor, S3C72G9 Datasheet - Page 96

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S3C72G9

Manufacturer Part Number
S3C72G9
Description
The S3C72G9 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrangeable M
Manufacturer
Samsung semiconductor
Datasheet
   

XOR
Operation:
Description:
Example:

dst,src
A,#im
A,@HL
EA,RR
RRb,EA
XOR performs a bitwise logical XOR operation between the source and destination variables and
stores the result in the destination. The source contents are unaffected.
A,#im
A,@HL
EA,RR
RRb,EA
If the extended accumulator contains 0C3H (11000011B) and register pair HL contains 55H
(01010101B), the instruction
XOR
leaves the value 96H (10010110B) in the extended accumulator.
Operand
Operand
EA,HL
Exclusive-OR immediate data to A
Exclusive-OR indirect data memory to A
Exclusive-OR register pair (RR) to EA
Exclusive-OR register pair (RRb) to EA
1
0
0
1
0
1
0
1
1
0
0
1
0
0

0
1
1
0
1
0
1
Binary Code
Operation Summary
1
1
1
1
1
1
1
d3
1
1
1
0
1
0
d2
r2
r2
1
0
1
1
d1
r1
r1
0
1
0
0
d0
1
1
0
0
0
0
A
A
EA
RRb
A XOR im
A XOR (HL)
EA XOR (RR)
Operation Notation
RRb XOR EA
Bytes
2
1
2
2
 
Cycles
2
1
2
2

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